What is RISC-V? Origins and Forecast
Pronounced “risk five”, RISC-V is a free and open instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. The acronym itself means Reduced Instruction Set Computer (the ‘V’ refers to its generation). Born at Berkeley University, RISC-V ISA delivers free, extensible software and hardware freedom on architecture, paving the way for years of computing design and innovation.
How does it work and how is it different from other ISAs? Its name actually describes the way in which software talks to an underlying processor – with a reduced instruction set. That is the first key difference as the x86 ISA for Intel/AMD processors and the ARMv8 ISA for ARM processors use custom productions of CISC – complex instruction set computing architectures. The second key difference is RISC-V ISA is open so that anyone can build a processor that supports it licensing-free while Intel and the other companies mentioned own the IP for their architectures and keep it closely guarded.
Due to its decidedly free and open nature, a foundation was founded in 2015 to ensure RISC-V flourishes. The RISC-V Foundation consists of more than 275 members building the first open, collaborative community of software and hardware innovators who are driven to power a new era of processor innovation. The foundation is a non-profit corporation controlled by its members who direct the future development and drive the adoption of the RISC-V ISA. Members have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystems.
Essentially, the technology and foundation have created an instruction set architecture together with enough structure and automation that allows teams to build families of processors much more easily. And, they chose to distribute it as an open source piece of IP so that the community can add to it. It has aspects of the open source movement, it has aspects of the configurable processor movement, and it has the opportunity to restructure how we think about the costs of microprocessor IP.
The Key Advantages of RISC-V
For companies supplying products to customers, lock-in is a wonderful thing. It means that once the vendor has the customer it is very hard for the customer to change to a competitor’s product. The best way to create lock-in is to have good-enough products and a rich ecosystem. That way, once you have the customer, they have invested too much into the implementation and you have them locked-in for a very long time. Think Apple.
However, this can become a slippery slope if companies are not able to compete on the merit of their solutions – progress will stagnate. Companies invest just enough to keep customers happy – no more, no less.
RISC-V opens the door to change this dynamic since a single software ecosystem built on the RISC-V standard supports many different processor vendors, and the processor vendors must now compete on the merit of their product for different applications. Customers don’t need to settle for good-enough, and competition will most likely mean a significant acceleration of innovation in embedded processors. Also, without the need for each new processor startup to build an expensive ecosystem, the door is open for many new innovative processor companies.
These new and more innovative processor companies could further benefit from leveraging RISC-V by enjoying the more resilient and free from supplier & country restricted supply chains.
Comparing ARM and X86 architectures to RISC-V – we can see some distinct advantages:
- Free: RISC-V is open-source, there is no need to pay for IP.
- Simple: RISC-V is far smaller than other commercial ISAs.
- Modular: RISC-V has a small standard base ISA, with multiple standard extensions.
- Stable: Base and first standard extensions are already frozen. There is no need to worry about major updates.
- Extensible: Specific functions can be added based on extensions. There are many more extensions are under development.
The business end of this market will likely continue to follow the same model as Linux, where commercial vendors add in their own IP and support. Commercial suppliers of RISC-V cores already include Nvidia, Cortus, Codasip, and more. The only ISA that relies on CISC today is x86. Other ISAs such as ARM, ARC, MIPS, and PowerPC are based on RISC.
Developers Should Pay Attention to RISC-V
There is more adoption in the market due to mass demand for cost effective and flexible processors in fields showing extremely high demand – like IoT and edge computing. RISC-V promises to give makers and creators more flexibility in their designs at lower costs.
There is justified and high interest in this new standard, and there is such a diverse set of companies working together to make it a reality, including processor IP competitors all targeting the same specification, it would be a smart move to add RISC-V to the processor selection discussion in planning and development phases of just about any IoT project.
With the expected explosion of innovation and growth that RISC-V underlines, talking with experienced professionals at TECHDesign can assist in planning – from board to processor choice all the way to manufacturing and sales strategy.
2 thoughts on “What is RISC-V? Origins and Forecast”
As the link itself explains, in your list essentially only x86 is CISC.
ARM (née Advanced RISC Machines), PowerPC, MIPS are definitely RISC ISAs.
Hi Mario, thanks for your heads up! We have modified the content.