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What You Need to Know about HyperRAM™ – An Alternative Memory Option

1. What is HyperRAM™?

Before knowing HyperRAM™, one should understand HyperBus™ first. HyperBus™ technology was first unveiled by Cypress in 2014, and according to Cypress, “the HyperBus™ interface draws upon the legacy features of both parallel and serial interface memories, while enhancing system performance, ease of design, and system cost reduction.” HyperRAM™ is a new technical solution which supports the HyperBus™ interface. The first generation of it offers a throughput up to 333 MB/s, and HyperRAM™ 2.0 made it possible to boost up to 400 MB/s.

 

2. What is the current HyperRAM™ status of Winbond?

Winbond Electronics has decided to cooperate with Cypress, which first launched its HyperRAM™ product in 2015, and join the HyperRAM™ camp. In terms of HyperRAM™, Winbond has launched 32Mb/64Mb/128Mb density products already, and 256Mb/512Mb density products are under development. This move will help Winbond further expand its product portfolio to respond to the diverse application needs, as well as make the ecosystem more complete through active participation. Currently, products of 24BGA (6×8 mm2) with automotive grade, 49BGA (4×4 mm2) and WLCSP (Wafer Level Chip Scale Package) with targeting consumer wearable market, and KGD (Known Good Die) are all available.

 

3. What is the current HyperRAM™ ecosystem?

At present, in addition to Cypress, leading MCU companies such as NXP, Renesas, ST, and TI have already provided MCUs that support HyperBus™ interface, and their new products will continue to support in the future. Meanwhile, its development platform of control interface is ready. Cadence, Synopsys and Mobiveil have also begun to provide HyperBus™  memory control IP, which can accelerate IC vendors’ design cycle.

As a result, compared to other Octal RAMs, HyperRAM™ has the most mature application environment. HyperRAM™ is compliant with JEDEC JESD251 profile 2.0. Moreover, after Winbond joined the HyperRAM™ camp, it becomes the third supplier in the market other than Cypress and ISSI, which can provide customers more choices.

 

4. What is the benefits of HyperRAM™ ?

“Low pin count, low power consumption, and easy control are the three key features of HyperRAM™ which can significantly improve the performance of end devices.” Described by Hans Liao, Technology Manager of DRAM Market at Winbond.

Fig. 1 The benefits of HyperRAMTM (Source: Winbond)
Fig. 1 The benefits of HyperRAM™ (Source: Winbond)

 

Take Winbond’s 64Mb HyperRAM™ as an example, the power consumption of Standby is 90uW@1.8V and 110uW@3V, while that of the same capacity SDRAM is about 2000uW@3.3V. More importantly, power consumption of HyperRAM™ has only 45uW@1.8V and 55uW@3V in Hybrid Sleep Mode[1], which is a significantly difference from the Standby mode of SDRAM.

Fig. 2 The power consumption comparison between 64Mb HyperRAMTM, LPSDRM, pSRAM and SDR on Standby and Hybrid sleep mode (Source: Winbond)
Fig. 2 The power consumption comparison between 64Mb HyperRAM™, LPSDRM, pSRAM and SDR on Standby and Hybrid sleep mode (Source: Winbond)

 

Fig. 3 The power consumption comparison between 64Mb HyperRAMTM, LPSDRM, pSRAM and SDR on Operation mode (Source: Winbond)
Fig. 3 The power consumption comparison between 64Mb HyperRAM™ , LPSDRM, pSRAM and SDR on Operation mode (Source: Winbond)

 

If Low Power SDRAM is adopted, the form factor is still bigger than HyperRAM™. That makes it not an ideal solution as Low Power SDRAM requires larger PCB area.

In addition, HyperRAM™ has only 13 signal pins, which can greatly simplify the PCB layout design. It also means that during design phase of the products, more PIN-outs will be available for other use cases with HyperRAM™ regarding those designed with DRAMs. And because of connecting fewer pins, it is more cost-effective as well.

Simplifying control interface is another feature of HyperRAM™. Based on pSRAM architecture, HyperRAM™ is a self-refresh[2] RAM which can automatically return to Standby mode after read/ write operation. This could reduce the effort of system design and firmware development.

 

5. How does HyperRAM™ position itself comparing to other DRAMs?

Comparing to other DRAMs, HyperRAM™ works in the same bandwidth with fewer pin-counts and lower power consumption. Moreover, HyperRAM™ offers a new interface HyperBus™ as a feature for customers to choose from.

Fig. 4 The comparison between HyperRAMTM and other DRAMs on pin-counts and power consumption (Source: Winbond)
Fig. 4 The comparison between HyperRAM™ and other DRAMs on pin-counts and power consumption (Source: Winbond)

 

6. What applications and industries need HyperRAM™ ?

HyperRAM™ is especially for applications that require low power consumption and high MCU computing power in automotive, industrial 4.0, smart home and wearable markets, such as dashboards, HMI industrial control panels, smart home devices, voice control devices, bike computer and smart bands, etc.. Besides, for IoT edge device applications, various design considerations such as low cost, low power consumption, and computing efficiency also suit the characteristic of HyperRAM™.

Fig. 4 HMI use cases for HyperRAMTM (Source: Winbond)
Fig. 4 HMI use cases for HyperRAM™ (Source: Winbond)

Other than above, for battery-powered devices such as smart speakers and smart meters, battery life has become the key to the success of the product, in addition to the rich IoT function and easy-to-use human interface. This makes low power consumption increasingly important. To achieve long battery life, in addition to using power consumption MCU, the other low-power peripheral components should also be considered, and HyperRAM™ is designed for this.

[1] Hybrid sleep mode:
Hybrid sleep mode is one of the common power save modes which makes memory retention possible when most of the internal circuits are off the grid. It was designed for batter powered products and long standby products.

[2] Self-refresh:
According to Wikipedia, “in a DRAM chip, each bit of memory data is stored as the presence or absence of an electric charge on a small capacitor on the chip. As time passes, the charges in the memory cells leak away, so without being refreshed the stored data would eventually be lost. To prevent this, external circuitry periodically reads each cell and rewrites it, restoring the charge on the capacitor to its original level.”

And according to a datasheet from Winbond, “the Self Refresh command can be used to retain data in the DRAM, even if the rest of the system is powered down. When in the Self Refresh mode, the DRAM retains data without external clocking.”

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