OTA Update with SpiFlash Stacked Die Memory Solutions
The automotive industry has come a long way from the days of carburettor controlled engines with mechanical steering to battery powered AI incorporated vehicles which almost seem to dwell in the realm of science fiction. We are incorporating more and more control units in the vehicles like:
- Body control module (BCM),
- Lights driver unit (LDU),
- Airbags controller,
- Antilock braking system (ABS),
- Electronic stability control (ESC) and the list goes on.
Not to mention there are electric vehicles (EVs) which add another set of control units to the units already mentioned above like:
- Battery management system (BMS) and
- Motor controller unit (MCU)
In this earlier article we explained the need for Over the Air (OTA) updates and explored the use of QspiNAND Flash memories in OTA updates. QspiNand is a type of non-volatile memory with fast read and write speeds at a reasonable cost and excellent reliability.
In this article, we will discuss the need of writing the code without taking the system offline during OTA and the different memory options available for its implementation like read-while-write memories and SpiFlashdie stacking memories. Lastly, we will explore Winbond’s SpiFlash stacked die solution known as SpiStack™ in brief and understand its suitability for OTA applications.
What is OTA update and why
In this rapidly changing world, customer expectations and requirements also change quickly. To keep up with the changes, there is a paramount need for an effective way to update any product. OTA updates allow one to fix bugs, enhance user experience and dish out new features to improve performance and reliability. Not only does it save the company a significant amount of money which they would have spent calling the vehicle to the service center (vehicle recall) or sending someone to the customer’s place and manually updating the ECUs but it also makes customer’s experience better by saving them from the inconvenience of hassling with a broken down vehicle due to a frivolous bug.
In electric vehicles, we have to continuously monitor the state of the vehicle to identify and prevent safety-critical conditions, such as cell temperatures, motor temperatures and short circuit detection. We cannot rely on a system which goes offline while it is updating. There are multiple methods to meet the requirements, like doubling the size of flash, making partitions and using dual memory hardware, etc. The method one selects should be suitable for the targeted application as it will affect the system’s cost and reliability.
Why Read-While-Write Flash Memory
As we explained the need for continuous monitoring of critical systems like BMS and BCM, we cannot afford to take them offline while we are updating because they are critical to the passenger’s safety. We cannot use the existing flash storage method where we download the new code and at the reboot, and the code is decompressed and written to DRAM for execution while the system is offline. Hence, we need a memory where we can write at the same time. One way to do it is to have a separate flash memory sitting alongside the primary flash that gets activated only when we want to write the new code during OTA. Once the OTA update is successful, it switches over to the secondary flash while making the primary one inactive. This way we don’t interrupt the running program and update the firmware as well. However, this comes with an added cost of having two flash memories and having to provision a chip select pin to switch between the drives along with the extra space required on the board.
To tackle this problem, one solution is to increase the size of the flash memory and create a partition in it. This way, we can use one partition to keep the program running by supporting the read operations, and in the other partition we can erase/write the updated code. We can see the IC as a stack of two memories merged in the same die and we call this architecture Read-While-Write (RWW) flash.
On the firmware level, it is generally implemented in two ways. In the first method, we can configure direct memory access (DMA) to give access to the memory to the hardware connected and request the data. It will avoid the bus conflicts while other operations are going on. In the second method, we disable the global ISR (interrupts) and directly write the flash function into the internal RAM of the controller. Using RWW memories, we save the cost of having two flash memories while enjoying the consistency of not halting the operations during OTA update. This architecture is not without demerits though. The IC has two memories in a single die, and the interferences during normal operation are very high because erase/write operations are highly power-consuming and noisy. To prevent data corruption, we need to provide higher internal isolation between the read and erase/write partitions to make them function reliably, which inadvertently drives up the cost and size of the package. The ICs are only composed of NOR flash which is good for code execution and reading the data while the ICs are being executed as they provide enough address lines to access the whole memory size. However, this architecture also makes the cost per bit higher and slows down the Erase/Write functions. Given the same form factor, the memory density is lower for NOR flash as compared to NAND flash.
In automotive applications, write speeds matter a lot as the sensors need to write data in the memory for the system to work properly. With the advent of technologies and AI, we are using devices like cameras and LiDAR sensors to map out the surroundings which need extremely fast write speeds so that the system can make quick decisions without lag. Hence, we prefer NAND flash memory in these applications for its fast write speeds. RWW memories, in which only NOR is present, make them less flexible in the applications.
SpiFlash Stacked Die Memory – SpiStack™
To address the shortcomings of the RWW memories, Winbond came up with a SpiFlash stacked die memory design known as SpiStack™ where we have two identical memory dies stacked in a single package so that one can use one die as read and the other as the erase/write memory. It removes the interference associated with the RWW memories thus providing more flexibility to perform read and write operations at high speed. Since the IC has two dies stacked, it provides double the amount of memory as opposed to the read while write memories in the same hardware package. This is ideal for OTA applications because here you can continue the read function from one die of memory and perform erase/write on the other die and at the next reboot cycle you can switch over to the die where you wrote the latest image file.
You must be wondering that to select the two dies, it must provide hardware Chip Select (CS) lines individually and that will add an additional pin to the hardware package compared to the RWW memories. However, this is not the case. Winbond has implemented this Chip Select through software thus saving the problem of having multiple chip select lines for two dies. As there are two dies stacked on top of each other, each die is given a preassigned die ID# from the factory, e.g., in the case of two dies 0x00 and 0x01. When we want to switch from one active die to another, we can send the command 0xC2 followed by the correct die ID#. But always make sure that you are sending the correct die ID# after the 0xC2 command so that both dies work as intended. This software CS solution makes the SpiStack™ Stacked Die memory compatible with your older design with conventional Flash memory as they both come in the same hardware package. Therefore, this solution saves you the time and effort required to change the board layout and additional changes in the manufacturing and assembling processes like tool change and AOI image changes. Winbond’s SpiStack™ memory is available in SOP, SON and BGA packages with different dimensions which you can check along with suggested PCB outlines and stencil sizes on this page. By changing over from conventional flash memory to SpiStack™ Stacked Die Memories you improve the system’s performance and make it OTA compatible without changing the board layout and minimal changes to the assembly line. In comparison to RWW, SpiStack™ memories consume less power as at a time only one die is powered as compared to the whole memory in RWW and it is less noisy due to inherent separation between the two dies. W25M321AV which has 4M-byte NOR Flash Memory and 128M-byte Serial SLC NAND Flash Memory consumes about 25 mA in active state and 10µA in standby.
The stacked dies can be a combination of different memory types such as NAND and NOR flash. NAND with its better programming time can be used to upload the workspace memory data quickly in case the power supply cutoff with NOR to store the boot code for its better retention and faster memory access speeds.
To prevent the addition of external reset pins for both dies, Winbond has implemented a software reset function as well which will reset the dies even though only one of the dies is actively communicating with the external SPI controller. The W25Q16JV die accepts Enable Reset (66h) and Reset (99h) instruction sequences while the W25N01GV die accepts Reset Device (FFh) instruction as we can check on the datasheet.
OTA Solutions from Winbond
With SpiStack™ having both homogeneous and heterogeneous die stacking you can select the product best suited for your application. They are suitable for applications like mobile phones, cameras, printers, servers, set top boxes, Bluetooth, GPS, Digital-TV, DSP, FPGA, WLAN, DSL/cable modem, gateway, industrial, etc.
Many of the products in the SpiStack™ series are AEC-Q100 certified and are suitable for direct applications in automotive products. The W25M321AV comes with W25Q32JV 4M-byte NOR Flash Memory and W25N01GV 128M-byte Serial SLC NAND Flash Memory. It gives you the best of both NOR and NAND flash memory in an 8 pin Standard WSON package. Compared to rival RWW memories like MX25UW3245G which provide only NOR flash memory it has higher memory density and faster SPI frequency at a throughput of 66MB/S for NOR flash and 40MB/S for NAND flash which is standard across W25MXXX family of products from Winbond. It works on a single 2.7V to 3.6V power supply and consumes about 25 mA in active state and 10µA in standby. With these features, it makes the W25MXXX family suitable for automotive applications. If you would like to know more about the product or obtain datasheet, please feel free to contact us.